The Indian law states that an IC layout design is not registrable if it is:

Form and Application for Registration

The application for registration has to be filed with the Semiconductor Integrated Circuits Layout-Design Registry. The Central Government has powers to define territorial limits within which a Registry Office shall exercise its functions. A Register of Layout-Designs shall be kept at the head office and branch offices containing information about all registered layout designs with the names, addresses and descriptions of the proprietor and such other matters.

The application to Registrar for registration of a layout – design shall be made on Form LD – 1 accompanied by prescribed fee of Rs. 5,000/- and shall be signed by the applicant or his agent.

After the application is made the acknowledgement shall be given by the registrar by way of returning one copy of the application on Form LD-1 with the official number of the application duly entered thereon

Objections to Acceptance and Hearing

On consideration of the application of any:

If the Registrar has any objection to the acceptance of the application, or proposes to accept it with certain amendments or modifications, the Registrar shall communicate such objections or proposal in writing to the applicant.

Further, if the applicant does not amend the application according to the proposal aforesaid, or does not present his observations with regard to the same, the application shall be deemed to have been abandoned.

Advertisement of Application After acceptance, the application shall be advertised within 14 days after the date of acceptance and in case of no opposition the layout-design shall be registered.

Opposition:

In case, any person wants to file an opposition to the layout-design, he can do so within three months from the date of advertisement of the accepted design. This period can however be extended by one month.

The notice of opposition by the opponent has to be given on Form LD – 2. Furthermore, an application for an extension of period of opposition shall be made on Form LD – 30.

The Registrar shall send the copy of the abovementioned oppositions to the applicant and the applicant has to reply to the same within a period of 2 months. The reply to the above opposition is called as the counter statement.

The Registrar shall provide the copy of such counter statement to the opponent. Any evidence which is relied upon by both the parties shall also be submitted and the Registrar may after hearing the parties will give a decision on the same.

Registration:

If the application has not been opposed in the prescribed time or if it was opposed, the opposition has been decided in favour of the applicant then the Registrar shall register the layout – design in the register.

Date of Registration:

Entry in the Register:
The entry in the Register shall include the following:-

Certificate of Registration:
The Certificate of registration of a layout – design shall be given on Form OLD – 2. The Registrar on request of the registered proprietor may issue the copy of Certificate of registration. Such a request has to be made in Form LD – 25.

The registration of a layout-design shall be for a period of 10 years from the date of filing an application for registration or from the date of first commercial exploitation anywhere in India or in any country whichever is earlier.

Reproducing, importing, selling or distributing for commercial purposes a registered layout-design or a semiconductor integrated circuit incorporating such design shall constitute infringement. However, if reproduction of layout-design is for purposes of scientific evaluation, analysis, research or teaching, this shall not constitute infringement.

Any person found to be infringing a registered layout-design shall be punishable with imprisonment for a term which may extend to three years or a fine which shall not be less than INR 50,000 and may extend to INR 10 lakhs, or both

Section 19 of the Semiconductor Integrated Circuits Layout-Design Act, 2000 specifies that registration of a semiconductor integrated circuit layout-design is “prima facie evidence” of its validity. Therefore, a layout-design, even if it is original within the meaning of section 7(2), has to be registered under the Act to get adequate protection. Without registration proving originality in case of a dispute becomes an onerous task.

Section 32 has empowered the Central Government to set up an Appellate Board by notification in the Official Gazette to be known as the Layout-Design Appellate Board. It should be noted here that according to section 55, the Intellectual Property Appellate Board constituted under section 83 of the Trademarks Act is to exercise the jurisdiction and powers conferred on the Appellate Board till the Board is established. he Appellate Board is to consist of a Chairperson, Vice-Chairperson, and other members as required.

Subject to the other provisions of this Act, the Bench may exercise jurisdiction, powers and authority of the Appellate Board. A Bench shall consist of one Judicial Member and one Technical Member and shall sit at such place as the Central Government may specify by notification in the Official Gazette.

According to Section 42, any person aggrieved by an order or decision of the Registrar under this Act, or under allied rules may appeal to the Appellate Board within three months from the date of such order or decision.

According to Section 43, the Appellate Board shall not be bound by the Code of Civil Procedure, 1908 but shall be guided by principles of natural justice.

The Appellate Board shall have the same powers as are vested in a civil court under the Code of Civil Procedure, 1908 for the purpose of discharging its functions under this Act while trying a suit in respect of the following matters, namely

Appeal from the Appellate Board may be made to the High Court. The appeal has to be made in accordance with the provisions of the Code of Civil Procedure, 1908.